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1. Power consumption: a key criterion in system-on-chip design
The first generations of embedded electronic systems may have required particular optimization in terms of energy consumption (e.g. satellite electronics). However, these systems were mainly specific, and the need for low-power design standards and tools did not really emerge. As already mentioned, mobility (e.g. computers, telephones, PDAs, tablets) was the first factor to lead circuit designers to consider energy consumption as an important criterion justifying adapted techniques and tools. The manufacturers concerned then needed approaches clearly supported by silicon foundries and electronic CAD tools to produce circuits with controlled energy consumption. In 2003, for example, the conclusion of an article in HP
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Power consumption: a key criterion in system-on-chip design
Techniques used to reduce consumption
Bibliography
Websites
ITRS, International Technology Roadmap for Semiconductors, ITRS Reports: http://www.itrs2.net/itrs-reports.html (2011 Edition, System Drivers, 2012 Update Overview)
IEEE Standard 1801-2015 UPF, ...
Standards and norms
IEEE Unified Power Format (UPF) for Design and Verification of Low-Power, Energy-Aware Electronic Systems, Standard IEEE 1801, 2015.
Extensions to the IEEE 1685™-2009 IP-XACT standard to describe a power management structure at the RTL level have been proposed:
Directory
Documentation – Training – Seminars (non-exhaustive list)
ECOFAC Thematic School: Thematic School on Low-Consumption Design for Embedded and Real-Time Systems, http://gdr-isis.fr/news/2148/121/Ecole-Thematique-Conception-Faible-Consommation-pour-les-systemes-embarques-et-temps-reels.html
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