Power management techniques in system on chips

As applications continue to evolve towards greater complexity, we are at the same time witnessing increasing difficulties in exploiting advances in semiconductor technology aimed at providing high-performance solutions for these applications. For example, the Internet of Things (IoT) is a term used to describe a whole range of embedded systems and applications, which are expected to enjoy considerable commercial growth. These include smart wearables, which include sensors, communication, memory and computing elements, with a significant share of embedded software. In the field of mobility, the prospect of systems based on dynamic adaptation (systems identified with the prefix "software-defined" such as "software-defined network" or "software-defined application") aims to make the infrastructure more flexible in its service offering to mobile users. Virtual reality is also a fast-growing sector, with potentially numerous applications requiring significant computing and memory power. The move towards ultra-high-definition display resolutions has a direct impact on the computing power, memory sizes and data rates that hardware architectures have to support. This brief overview of the applications field illustrates why the need for embedded electronics continues to grow. The mobility underlying all these systems places the emphasis on the energy required to operate them over a period of time without recharging, which should not be too much of a constraint for normal use of these systems. This often involves finding architectural solutions that maximize the ratio of computing power per joule consumed, so as to allow a correct operating time between two battery recharges.

Furthermore, as mentioned above, semiconductor technology today is struggling to ensure that circuit characteristics improve in line with the dynamics observed over the last forty years (dynamics described by Moore's Law and its variants). As we show in the following pages, maximizing the ratio of computing power per joule consumed is no longer always sufficient, and it may also be necessary to seek to maximize the ratio of computing power per watt consumed, mainly for reasons of thermal dissipation. Indeed, the embedded and mobile nature of some applications prevents the integration of sophisticated heat dissipation systems, so we need to act directly on the heat source to avoid a temperature rise that could affect system reliability.

In what follows, we illustrate the main techniques for structuring a circuit's architecture in order to control its power dissipation. Structuring a circuit into power domains and clock domains enables us to act on parameters that have a direct impact on power consumption. However, this structuring modifies the circuit's behavior and can lead to the introduction of logic...