6. Glossary
AVS: Adaptive Voltage Scaling
In normal operation, this technique is used to adapt the supply voltage to a fixed clock frequency. It is used to compensate for the effects of temperature variations and/or aging on transistor characteristics, or the variability of the manufacturing process.
Clock gating
The aim of this technique is to inhibit the clock of blocks that are in an inactive state. Compared with power gating, the power supply is maintained, so the memory cells retain their state.
Power gating
The aim of this technique is to determine the states of the power switches in the blocks according to their functional states.
Clock domain
All the blocks in a circuit that receive their clock from the same source. The...
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Glossary
Bibliography
Websites
ITRS, International Technology Roadmap for Semiconductors, ITRS Reports: http://www.itrs2.net/itrs-reports.html (2011 Edition, System Drivers, 2012 Update Overview)
IEEE Standard 1801-2015 UPF, ...
Standards and norms
IEEE Unified Power Format (UPF) for Design and Verification of Low-Power, Energy-Aware Electronic Systems, Standard IEEE 1801, 2015.
Extensions to the IEEE 1685™-2009 IP-XACT standard to describe a power management structure at the RTL level have been proposed:
Directory
Documentation – Training – Seminars (non-exhaustive list)
ECOFAC Thematic School: Thematic School on Low-Consumption Design for Embedded and Real-Time Systems, http://gdr-isis.fr/news/2148/121/Ecole-Thematique-Conception-Faible-Consommation-pour-les-systemes-embarques-et-temps-reels.html
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