Français
4. Integrating low-energy techniques into the design flow
Commercial circuit simulation and synthesis tools offer functions for integrating power management mechanisms into a circuit. Some power consumption optimization techniques are directly integrated into logic synthesis tools, for example the use of flip-flops where the clock can be controlled by an authorization signal to perform local clock gating. On the other hand, structuring an RTL model of a circuit architecture to include power management mechanisms such as those described above is a function of more general-purpose tools.
As a result, CAD tool vendors have been offering low-power extensions to their classic design flow, based on a textual specification of a power management structure (often called a power intent). The first formalisms introduced to describe a power intent date back to 2005; since then, the IEEE 1301 Unified Power Format (UPF) standard has...
The Ultimate Scientific and Technical Reference
This article is included in
Software technologies and System architectures
This offer includes:
Knowledge Base
Updated and enriched with articles validated by our scientific committees
Services
A set of exclusive tools to complement the resources
Practical Path
Operational and didactic, to guarantee the acquisition of transversal skills
Doc & Quiz
Interactive articles with quizzes, for constructive reading
Integrating low-energy techniques into the design flow
Conclusion and outlook
Bibliography
Websites
ITRS, International Technology Roadmap for Semiconductors, ITRS Reports: http://www.itrs2.net/itrs-reports.html (2011 Edition, System Drivers, 2012 Update Overview)
IEEE Standard 1801-2015 UPF, ...
Standards and norms
IEEE Unified Power Format (UPF) for Design and Verification of Low-Power, Energy-Aware Electronic Systems, Standard IEEE 1801, 2015.
Extensions to the IEEE 1685™-2009 IP-XACT standard to describe a power management structure at the RTL level have been proposed:
Directory
Documentation – Training – Seminars (non-exhaustive list)
ECOFAC Thematic School: Thematic School on Low-Consumption Design for Embedded and Real-Time Systems, http://gdr-isis.fr/news/2148/121/Ecole-Thematique-Conception-Faible-Consommation-pour-les-systemes-embarques-et-temps-reels.html
...
The Ultimate Scientific and Technical Reference
