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Article | REF: E2461 V2

Test of integrated digital circuits - Design For Testability

Authors: Mounir BENABDENBI, Régis LEVEUGLE

Publication date: May 10, 2022

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2. IEEE 1149.1 boundary scan standard

A major difference from the above is that the devices in the IEEE 1149.1 are not primarily intended for testing the circuit itself, but to support the testability of boards and equipment. This hierarchical use of the standard in a product is not detailed here; this paragraph presents the basic concepts of the approach and the main elements to be integrated into a circuit to make it compatible with this standard. We detail the architectural aspects of this standard to enable a better understanding of the following section dedicated to system-on-chip testing. Indeed, the standards that have been defined subsequently take up some of the principles of this standard to solve the problems of observability and controllability. Nevertheless, for further details, the official IEEE standard test access port and boundary scan...

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IEEE 1149.1 boundary scan standard
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