Out-of-order superscalar processors

This article examines the main features of data-flow superscalar processors, often referred to as out-of-order superscalars. Like all superscalars, these processors use the instruction parallelism existing in a sequential program to execute instructions that can be executed simultaneously in parallel, under hardware control. Whereas in-order superscalars can only start executing a small number of instructions (2 to 4) in the pipelines of the various operators, data-flow superscalars consider a much larger number of instructions to make the most of the data flow between instructions. Instructions are read and decoded in sequence, executed in data flow, and terminated in sequence to allow exceptions to be handled as in the case of strictly sequential execution.

This article presents the mechanisms and structures that enable both "data flow" and orderly termination. The reorder buffer (ROB) receives decoded instructions and guarantees orderly termination. Data dependency management is handled by register renaming, which can be partial (via ROB entries) or total (via physical registers and a mapping between these physical registers and architectural registers). Reservation stations" feed the operators, enabling operator results to be fed back as soon as possible into the inputs of stations awaiting these results. The problems of recovery from speculative erroneous execution, interrupts, multithreaded execution and memory buffers are also presented.

After a brief history, the concepts introduced are illustrated using examples of Intel processors, from the Pentium Pro to Core multi-cores, some of which use partial renaming and others total renaming. The example of IBM's Power 4, which provides the "data flow" part with groups of instructions and terminates instructions by group, is also detailed.

The limits of instruction parallelism in sequential code, the wall of heat and little performance gain resulting from a significant increase in hardware complexity have made superscalar "dataflow" processors the last high-end monoprocessors. But they are now the core of most multicore processors.