Article | REF: H1201 V1

Risc-V: an open source instruction set

Author: Daniel ETIEMBLE

Publication date: May 10, 2020, Review date: January 5, 2021

You do not have access to this resource.
Click here to request your free trial access!

Already subscribed? Log in!


Français

2. RV32I basic instruction set

The basic instruction set, called RV32I, comprises 47 instructions. There are 32 32-bit registers named x0 to x31 and a program counter (pc). Register x0 contains 0 and can be used as the destination register of an instruction when the result is not used.

2.1 Instruction format

Instructions are of fixed 32-bit size, with a 7-bit opcode, i.e. 128 fundamental opcodes (table 1 ). For RV32I, the two bits [1:0] of the opcode are 11, which means that the remaining 75% of opcodes are available for the various extensions presented in Chapters 3, 4 and 5. On the other hand, only 11 of the 32 opcodes are actually used, i.e. 8.6% of the total number of fundamental opcodes.

You do not have access to this resource.

Exclusive to subscribers. 97% yet to be discovered!

You do not have access to this resource.
Click here to request your free trial access!

Already subscribed? Log in!


The Ultimate Scientific and Technical Reference

A Comprehensive Knowledge Base, with over 1,200 authors and 100 scientific advisors
+ More than 10,000 articles and 1,000 how-to sheets, over 800 new or updated articles every year
From design to prototyping, right through to industrialization, the reference for securing the development of your industrial projects

This article is included in

Software technologies and System architectures

This offer includes:

Knowledge Base

Updated and enriched with articles validated by our scientific committees

Services

A set of exclusive tools to complement the resources

Practical Path

Operational and didactic, to guarantee the acquisition of transversal skills

Doc & Quiz

Interactive articles with quizzes, for constructive reading

Subscribe now!

Ongoing reading
RV32I basic instruction set