Article | REF: H8260 V1

Energy and power in embedded systems

Author: Nathalie JULIEN

Publication date: February 10, 2015 | Lire en français

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    Overview

    ABSTRACT

    This article describes some trends in present needs and future developments in embedded systems as regards power and energy consumption. Considering the roadmaps for the evolution of embedded applications, power and energy consumptions, which are already a critical constraint in current systems, must be integrated at all design levels, just as area and time. To focus on the optimization issues, we look at the sources of this consumption in CMOS technologies, its distribution in the circuits and systems, and the main optimization methods currently used, together with some design rules to follow.

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    AUTHOR

    • Nathalie JULIEN: University Professor – Université de Bretagne Sud assigned to ENSIBS and Lab-STICC Lorient

     INTRODUCTION

    The limiting factor in microelectronic system design has evolved from integration density problems to other issues such as power dissipation and the increasing variability of manufacturing processes.

    The need for low-power solutions is particularly strong in the following three application areas: intelligent ambient systems (including mobile communications and sensor networks), automotive and consumer electronics.

    According to Intel, every 1% increase in performance currently results in a 3% increase in power consumption, for a variety of reasons. The size of transistors decreases and their number increases for a given surface area, clock frequency increases, leakage current increases, inducing heat and losses. If the number of transistors per unit area continues to increase in the same way, without improving power management, microprocessors in 2015 will consume on the order of tens of thousands of watts per cm 2 , bringing the component dangerously close to the melting temperature of silicon. Power consumption is therefore becoming a critical constraint. In fact, some manufacturers have seen their high-performance chips melt away when all computing capabilities were activated!

    From a design point of view, several constraints need to be mastered: cost (at most a few dollars per chip for mass-market electronics), consumption (the "power budget" is constant, so more computing power per watt will be needed) and surface area (to limit cost, manufacturing and design constraints). Computing needs are set to grow faster than processor performance, implying the need for low-power implementations and flexible platforms where performance (expressed in MOPS for millions of operations per second) increases without increasing power dissipation. What's more, battery technology is evolving much more slowly than power demand for mobile computing and communication circuits.

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    KEYWORDS

    power   |   energy   |   low power design   |   temperature


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