Article | REF: H8250 V1

Formal methods for the verification of embedded systems

Author: Emmanuelle ENCRENAZ-TIPHENE

Publication date: February 10, 2013

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ABSTRACT

Embedded systems are subjected to a large number of constraints and certain are closely linked with hazardous processes or are involved in decision-making processes which impact human lives. In order to increase the degree of trust in these systems, several formal methods can be implemented: theorem proving, automated scrutiny of the system or specification refinement. In each case, the principle, major academic tools, certain industrial tool and practical achievements are presented.

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AUTHOR

  • Emmanuelle ENCRENAZ-TIPHENE: Engineer from the École Polytechnique Feminine - Senior Lecturer at Pierre et Marie Curie University, Paris

 INTRODUCTION

Embedded systems are subject to many constraints, and some interact closely with hazardous processes, or are involved in decision-making processes that impact on human lives. The development of such systems must offer guarantees of correct operation and recovery in the event of failure of an internal part or an unforeseen environment.

Formal verification methods can be implemented to increase system confidence. Three main classes can be distinguished:

  • theorem-proving ;

  • model-checking and its many variants and extensions;

    specification refinement.

The positioning of these approaches in the design flow of embedded systems is presented.

For each approach, we simply present the basic principle, the main field of application, the tools available and academic and industrial achievements. This article does not use advanced mathematical formalism, so as to be accessible to as many people as possible. The bibliographical references provide more detailed information on the formal aspects of each approach, as well as on the tools available and (where applicable) their use in an industrial context.

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KEYWORDS

review   |     |     |     |   Embedded systems   |   computer science   |   electronics   |   engineerings


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Formal methods for verifying embedded systems