Complete system-on-a-chip and block reuse

The term System On Chip (SOC) covers a new generation of electronic circuit integration:

• the first generation consisted in integrating on a single chip a specific function hitherto typically performed by interconnecting a number of elementary electronic components on a printed circuit board;

• the SOC is the integration of a more complete system on a single chip. Until now, this required the interconnection of several first-generation integrated circuits on a single board.

Each SOC block, called macroblock, core, intellectual property block or, in English, System Level Macro (SLM), core, or Semiconductor Intellectual Property (SIP, or IP for short), therefore performs a specific function, whose complexity can vary from the simple communication interface to the microprocessor core. This new terminology covers – and in fact naturally extends – the category of "system cells", presented in the article "Cell libraries for integrated circuits" in this treatise [E3510 ].

The move towards integrating increasingly complex systems on a chip is a challenge in itself. A further complicating factor is the dwindling time available to respond effectively and on time to market demand for the corresponding products (Time To Volume). In other words, how do you design and produce increasingly complex systems within ever-shorter deadlines?

Here are some of the routes identified for this purpose:

• System Level Entry: raising the level of abstraction in the design phase makes it possible to manage increasing complexity; transaction-level modeling (TLM), behavior-level synthesis and formal verification are the best examples;

• Hardware/Software Co-design, Co-verification: the parallelization of developments, not only of the different parts of the hardware considered, but also of the embedded software which is increasingly associated with it (Software IP, in comparison with the Hardware or Silicon IP considered here), makes it possible to reduce the overall design time;

• Fast Prototyping: intensive access to – rapid prototyping, generally based on FPGA (Field Programmable Gate Array) – logic circuits, increases the chances of getting a product "right first time", and therefore available on time on the market;

• IP Reuse: the reuse of existing, validated "pieces", specifically IPs, will also help on all three fronts: complexity, lead time, quality; this is the concept presented in this article;

• Platform Based-Design:...