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6. Embedded OS architectures
While heterogeneous hardware architectures are efficient from the point of view of peak performance (i.e. the performance that can be achieved by using the hardware to its full potential) and MIPS per Watt (number of instructions executed for a given energy consumption), they suffer from an obvious programming difficulty that can be summarized by the following three points:
Architectural differences. Processors may have different instruction sets, different word sizes (e.g. 32 bits for a general-purpose processor and 24 bits for a signal processor), and/or different memory representations (word byte order or endianness);
Non-standardized memory access. The areas of memory accessible by each processor may be different, may even be at different or overlapping addresses, and may require the use of specialized hardware...
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Embedded OS architectures
In a nutshell
Bibliography
Software tools
Google. Android http://developer.android.com/index.html
DSpace, Inc. dSpace. http://www.dspaceinc.com.
The Mathworks. Real-Time Workshop. http://www.mathworks.com/products/rtw/
...Websites
REEVES Glenn, "What really happened on Mars?", http://research.microsoft.com/en-us/um/people/mbj/Mars_Pathfinder/Authoritative_Account.html
...Events
Symposium on Operating Systems Design and Implementation, biannual (even-numbered years) leading symposium on operating systems, including OS for embedded systems, sponsored by USENIX and ACM.
International Conference on Architectural Support for Programming Languages and Operating Systems, a leading OS conference sponsored by the ACM.
Embedded Linux Conference, annual conference...
Standards and norms
- Standard Test Access Port and Boundary-Scan Architecture, IEEE Std. 1149.1-1990. - IEEE -
- Functional Safety of Electrical / Electronic / Programmable Electronic Safety-related Systems, IEC 61508-1998, International Electrotechnical Commission. - IEC -
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