Article | REF: SE4052 V1

Fault tree - Boolean context, analysis and mathematical foundations

Author: Jean-Pierre SIGNORET

Publication date: December 10, 2017

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2. Links with other SoF analysis methods

2.1 Links with BDF

The equivalence between logic gates and the structures used for reliability diagrams (figure 2 ) allows us to move from the ADD in figure 4 to the reliability diagram in figure 7 .

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Links with other SoF analysis methods